Contacts may be formed in order to make electrical connections to a semiconductor device. Contacts to a source region or a drain region of the semiconductor device may be referred to as CA contacts. CA contacts may be distinguished from CG contact which may form an electrical connection to the gate conductor of a semiconductor device. The source and drain regions must remain electrically insulated from the gate terminal in order to maintain functionality of the semiconductor device. Conversely, a short circuit between the source and drain regions and the gate terminal may damage the semiconductor device. A CA contact may be formed in a contact hole etched in a contact-level dielectric, and therefore would be surrounded by the contact-level dielectric. As a result of device scaling the need for borderless contacts has increased. A borderless contact may include CA contacts located in close proximity to surrounding semiconductor devices such that no amount of contact-level dielectric separates the CA contact from the semiconductor device structure.
As semiconductor devices shrink in each generation of semiconductor technology, formation of CA contact structures becomes more challenging because there is an increased risk of a short circuit between the gate terminal and the CA contact. The risk of a short circuit may be increased because the gate terminal and the CA contact may only be separated by a device spacer which may be susceptible to damage during etching the contact hole. Therefore, the likelihood of CA contacts shorting to the gate terminal of a semiconductor device increases in each generation. This problem may have a significant impact on product yield and reliability.
Fabrication of a CA contact may include the formation of an etch stop liner prior to the formation of the metal contact. The etch stop liner may be used as a robust liner to prevent damage of the underlying semiconductor device structure during etching of the contact hole. The etch stop liner may then be selectively removed from the bottom of the CA trench to allow for an electrical connection to the source/drain region. For example, the etch stop liner may include silicon nitride. An etch stop liner having a thickness of about 5 nm may function well as an etch stop, however, it decreases the CA contact opening and consequently decreases the effective CA contact width by about 10 nm. Such a reduction in the CA contact width may adversely increase the CA contact resistance. This is particularly problematic for future CMOS technology which typically has very small diameter CA contact holes.
There is therefore a continuing need for an improved method for fabricating borderless CA contacts to a semiconductor device.